The present invention relates in general to a memory system for processing digital video signals, and more particularly to a memory system for processing digital video signals having the function of random block read and serial block write which is required to compress and restore video signals.
Generally, random access memory(RAM) such as dynamic random access memory (DRAM) or static random access memory(SRAM) is used as the memory device of memory system for processing digital video signals.
In addition to RAM, a bit stream buffer and a memory controller are also required to convert a format of data in a format of block unit.
Referring to FIG. 1, there is shown a schematic block diagram of a conventional memory system for processing digital video signals.
As shown in FIG. 1, the memory system for processing digital video signals is comprised of a DRAM2 including a controller 1, a frame buffer 4 and a bit stream buffer 3.
A moving picture expert group(MPEG) system, which is a memory system for processing digital video signals, internally processes data in the pixel unit of 16.times.16 bits.
For this, the MPEG system converts the format of data into a format of the unit of random bit at the frame buffer 4 which is a DRAM, using the DRAM controller 1 and the bit stream buffer 3.
That is, the memory system for process digital video signals includes the DRAM controller 1 and the bit stream buffer 3 to convert of data the block unit of 16.times.16 bits into data of the unit of bit upon writing data to the frame buffer 4 and to convert data which is read in the unit of bit into data of the unit of 16.times.16 bits upon reading data which are necessary therein from the DRAM(4).
As above mentioned, since the conventional memory system for processing digital video signals processes digital data necessary to the signal process using SRAM or DRAM, a memory controller from the outside is used for the random block access which is essential in the present methods of international standard for processing video signals such as JPEG, MPEG and digital HDTV.
However, since the memory controller being used in the memory system for processing digital video signals should use the format of pipe line or memory multiplexing to improve the speed of read and write and its construction ais also complicated, there is a considerable problem in view of arrangement or control, upon developing its application system.